The New Jersey Institute of Technology's
Electronic Theses & Dissertations Project

Title:	A defect detection algorithm for sequential and parallel computers
Author:	Hross, Ralf
View Online:	njit-etd1995-086 (xi, 196 pages ~ 5.3 MB pdf)
Department:	Department of Electrical and Computer Engineering
Degree:	Master of Science
Program:	Electrical Engineering
Document Type:	Thesis
Advisory Committee:	Ziavras, Sotirios (Committee chair) Manikopoulos, Constantine N. (Committee member) Shi, Yun Q. (Committee member)
Date:	1995-05
Keywords:	Image processing--Digital techniques. Algorithms.
Availability:	Unrestricted
Abstract:	The comparison of images containing a single object of interest, where one of them contains a model object, is frequently used for defect detection/identification. This is often a problem of interest to industrial applications. To make this task more efficient, the implementation on parallel computers should be a major objective. This thesis introduces sequential and parallel versions of an algorithm that compares original(reference) and processed images in the time and frequency domains. The emphasis is on parallel implementation. This comparison may help to detect changes in images. Extracted data is also compared to database data in an attempt to pinpoint specific changes, such as rotations, translations, defects, etc. However, our emphasis is on defect detection. The first application considered here is recognition of an object which has been translated and/or rotated. For illustration purposes, an original image of a centered hypodermic needle is compared to a second image of the needle in a different position. This algorithm will determine if both images contain the same object regardless of position. The second application detects changes(defects) in the needle regardless of position and reports the quality of the needle. This quality is reported with a quantitative measurement. Finally, the performance of sequential and parallel versions of the algorithm on a Sun SPARCstation and on an experimental in-house built parallel DSP computer with eight TMS320C40 respectively processors is included. The results show that significant speedup can be achieved through incorporation of parallel processing techniques.