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The New Jersey Institute of Technology's
Electronic Theses & Dissertations Project

Title: Phase-locked loop, delay-locked loop, and linear decorrelating detector for asynchronous multirate DS-CDMA system
Author: Lee, Sok-kyu
View Online: njit-etd2001-043
(xi, 96 pages ~ 4.0 MB pdf)
Department: Department of Electrical and Computer Engineering
Degree: Doctor of Philosophy
Program: Electrical Engineering
Document Type: Dissertation
Advisory Committee: Klapper, Jacob (Committee chair)
Ansari, Nirwan (Committee member)
Frank, Joseph (Committee member)
Shi, Yun Q. (Committee member)
Michalopoulou, Eliza Zoi-Heleni (Committee member)
Date: 2001-01
Keywords: Phased-Locked Loop (PLL)
Delay-Locked Loop (DLL)
Synchronization
Linear Decorrelating Detector (LDD)
Multiuser Detection
Availability: Unrestricted
Abstract:

The performance of phase synchronization and code tracking of a digital phase-locked loop (PLL) and delay-locked loop (DLL), respectively, is investigated in wideband asynchronous multirate DS-CDMA system. Dynamic Partial Correlation (DPC) method is proposed to evaluate the autocorrelation and its power spectrum density (PSD) of the cross-correlated terms in the presence of multirate multiple access interference (MMAI) under additive white gaussian noise (AWGN) and fading channel environments. The steady-state probability density function (PDF) and variance of the phase estimator error and code tracking jitter is evaluated by solving the first-order Fokker-Planck equation.

Among many linear multiuser detectors which decouple the multiple access interference from each of the interfering users, one-shot window linear decorrelating detector (LDD) based on a one bit period to reduce the complexity of the LDD has attracted wide attention as an implementation scheme. Therefore, we propose Hybrid Selection Diversity/ Maximal Ratio Combining (Hybrid SD/MRC) one-shot window linear decorrelating detector (LDD) for asynchronous DS-CDMA systems. The selection diversity scheme at the input of the Hybrid SD/MRC LDD is based on choosing the branch with the maximum signal-to-noise ratio (SNR) of all filter outputs. The MR Combining scheme at the output of the Hybrid SD/MRC LDD adopts to maximize the output SNR and thus compensates for the enhanced output noise. The Hybrid SD/MRC one-shot LDD with PLL is introduced to track its phase error and to improve the demodulation performance. The probability density functions of the maximum SNR of the SD combiner, the near-far resistance (NFR) of one-shot LDD by Gaussian approximation, and the maximum SNR of the MR combiner for Hybrid SD/MRC LDD are evaluated, and the bit error probability is obtained from these pdfs. The performance of Hybrid SD/MRC one-shot LDD is assessed in a Rayleigh fading channel.


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