The New Jersey Institute of Technology's
Electronic Theses & Dissertations Project

Title:	Design of a communications interface for a very high performance computer
Author:	Zydallis, Jesse Boyd
View Online:	njit-etd1998-118 (x, 71 pages ~ 2.9 MB pdf)
Department:	Department of Electrical and Computer Engineering
Degree:	Master of Science
Program:	Computer Engineering
Document Type:	Thesis
Advisory Committee:	Ziavras, Sotirios (Committee chair) Carpinelli, John D. (Committee member) Hou, Edwin (Committee member)
Date:	1998-01
Keywords:	Computer architecture. Parallel processing (Electronic computers)--Design.
Availability:	Unrestricted
Abstract:	PetaFLOPS computing power is the newest goal of Federal Government agencies, in the increasingly active supercomputer field. To obtain this performance goal by the year 2007, sophisticated parallel processing designs are required. To effectively create network interfaces/routers for interprocessor communications in such computer systems, it requires optimal hardware and software codesigns. An interface is presented for the NJIT New Millennium Computing Point Design, a system that targets 100 TeraFLOPS performance by the year 2005. The router handles store-and-forward switching and wormhole routing for the system.