The New Jersey Institute of Technology's
Electronic Theses & Dissertations Project

Title:	Fault protection with a digital computer
Author:	Rockefeller, George D.
View Online:	njit-etd1968-014 (vi, 124 pages ~ 2.9 MB pdf)
Department:	Department of Electrical Engineering
Degree:	Master of Science
Program:	Electrical Engineering
Document Type:	Thesis
Advisory Committee:	Anderson, Robert E. (Committee chair) Russell, Frederick A. (Committee member) Meola, Robert R. (Committee member)
Date:	1968
Keywords:	Electric power-plants--Automation. Electric power-plants--Data processing.
Availability:	Unrestricted
Abstract:	A fundamental basis has been developed for the use of a time-shared stored-program digital computer to perform many of the electrical power-system protective-relay functions in a substation. Logic operations are given to detect a fault, locate it and initiate the opening of the appropriate circuit breakers, whether the fault is in the station or on lines radiating from the station. The instantaneous value of the station voltages and currents are sampled at a 0.5 ms rate, converted to digital form and stored for computer main-frame use. Operating times are compatible with the 25 ms breaker trip capability of modern two-cycle breakers. Computer speed in initiating tripping is a maximum of 4 ms for severe faults and a maximum of 10 ms for moderate or distant faults. Little attention has been given to hardware or programming aspects; instead this treatment represents the viewpoint of a protective-relay engineer who is attempting to answer the question: can it be done and what is involved? However, major emphasis was placed on minimizing computer main-frame duty.